On-Chip AHB Bus Trace Analyzer for Real Time Tracing With Lossless Data Compression

Abstract

The advanced micro controller bus  Architecture (AMBA) is widely used as the on-chip bus in System-on-Chip(SoC) designs. The important aspect of a SoC is not only which components or blocks it houses, but also how they are interconnected. AMBA is a solution for the blocks to interface with each other. The objective of the AMBA specification is to be technology independent, minimize silicon infrastructure while supporting high performance and low power on-chip communication. The biggest challenge in SoC design is in validating and testing the system.

The Advanced High-performance Bus (AHB) is a part of the Advanced Microcontroller Bus Architecture (AMBA). Performance can be improved at high-frequency operation. Performance is independent of the mark-space ratio of the clock. No special considerations are required for automatic test insertion. Our aim in this project is to design the AHB- protocol with bus tracer. For real-time tracing, we should reduce the trace size as much as possible without reducing the original data.

The experimental results show that trace compression ratio reduced by 96.32%. Finally this approach was designed successfully along with MODEL SIM and synthesis using Xilinx ISE. The SoC can be verified in field-programmable gate array.